In the case of fixed circuit board size, if more functions need to be accommodated in the design, it is often necessary to increase the track density of the PCB, but this may cause mutual interference of the track to be enhanced, and the track are too thin to make the impedance impossible to reduce. . Pay attention to crosstalk interference when designing high-speed, high-density PCB because it has a large impact on timing and signal integrity. Here are a few caveats:
1. Control the continuity and matching of the trace characteristic impedance.
2. The trace space. The spacing commonly seen is twice the line width. The simulation can be used to know the influence of the trace spacing on timing and signal integrity, and to find the minimum space that can be tolerated. The results may vary from chip to chip. Choose the appropriate termination method. Avoid the same running direction of the upper and lower adjacent layers, or even overlap with each other because the crosstalk is larger than that of the adjacent lines in the same layer.
3. Use blind/buried via to increase the area of the track. However, the manufacturing cost of the PCB board will increase. It is really difficult to achieve full parallelism and equal length in actual implementation, but still try to do it.
4. Differential termination and common-mode termination can be reserved to mitigate the effects on timing and signal integrity.