Not all components come in a BGA package, but those that do can have very high ball counts, fine pitch, and run at high speeds. These aspects of modern components create challenges in routing, often requiring impedance control and early consultation with your fabricator to ensure your routing style is feasible. In addition to a fabricator consultation, you’ll need to do some floorplanning to make sure you’re creating the most direct routes around your board.
For a new design, all these issues might sound like a lot of work. Within your design software, there is some up-front work required to set up routing rules so that you meet impedance requirements, as well as to ensure your layer stack helps simplify your escape routing away from the BGA. The way we route BGAs, we think about the required layer count and via sizes in escape routing first, then we worry about impedance control and ensuring low loss routing into inner layers. If you know you’ll need to design a board with BGA components, hopefully this article will help you think about the PCB stackup you’ll need to simplify your escape routing.
BGA Routing Depends on Board Stackup and Layer Count
The first step in BGA routing has nothing to do with routing, it’s all about determining the number of layers you’ll need for routing. For high-ball-count BGAs, the number of layers can get very high and the layer thickness can become very small in order to support the required number of traces with controlled impedance. Fortunately, there is a simple process you can use to estimate the number of signal layers required to fully breakout traces from your BGA.
- Count up the number of signal rows across the footprint of the largest BGA.
- Divide this number by 2 to get the total number of rows that will require breakout routing.
- Divide the number of breakout rows by 2 to get the number of signal layers required to support your signal rows.
If you’re using a rectangular BGA, use the short edge to count up your number of rows in the above formula. This is not typical outside of DDR and non-DDR SDRAM modules (see U5 above). In SDRAM modules, it’s typical to put a space between the rows of balls in the BGA to allow additional routing along the surface layer. One reason for this is that SODIMM RAM cards generally have limited layer counts (typically 4), so that leaves only 2 layers to route microstrips into dense SDRAM chips.
Once you’ve determine the layer count requirements, you can select a fanout style and size your vias.
Choose a Fanout Style
The standard BGA fanout style in a reasonably dense BGA (e.g., less than 1 mm pitch between balls) is a dog bone fanout, where small traces on the internal balls connect to vias between ball rows. When a denser BGA is used, the via and pad size may become so small that the fanout style will force the via to be placed directly in the solder pad for the BGA. In this case, the vias must be filled and plated over (called VIPPO) to create a solid copper pad for soldering during assembly. To determine whether via-in-pad or dog bone fanout can be used, you’ll need to determine the via size needed to route signals from the BGA footprint into the inner layer.
Sizing Vias in BGA Routing
One important parameter that is sometimes overlooked in BGA routing and fanout is the size of the vias required to reach inner layers. There is an important aspect of reliability to consider here as defined in the IPC-6012 standards. As the pitch between balls gets smaller, the space available for the annular ring on internal vias also gets smaller. This eventually forces the via diameter to get smaller to continue complying with IPC-6012. Eventually, the via aspect ratio gets too large for the given via diameter, creating a DFM issue and forcing the designer to opt for blind/buried/staggered vias for routing internal rows.
At this point, the only way to relieve the DFM issue and ensure a sufficiently large annular ring is to just use via in pad. The cutoff for using via-in-pad vs. dog bone fanout is not so clear and depends on the ratio of the BGA solder pad size to the pitch, as well as the layer count and layer thickness. This is a complex problem that takes some experience as well as advice from an experienced fabricator.
Very High Density with VIPPO
In very dense BGAs with very high signal net counts, eventually the layer thickness will get so small that you might be able to route groups of differential pairs between balls. These boards may have 12 or more signal layers in order to support such a high number of signals required in the BGA breakout, but the trace width could be small enough so that you can still limit the number of layers to a manageable number. If you follow the above process and create a proposed stackup, you’ll be able to determine the required trace width and spacing needed to meet impedance and crosstalk requirements.Make sure to send your stackup in for approval with your fabricator before you start BGA routing, otherwise you’re risking a redesign once the PCB layout is finished.
One option is to take advantage of the input impedance of long transmission lines and use short sections to double BGA routing away from the external rows of the BGA footprint.