How do I convert a Schematic to PCB Layout in KiCad ?

KiCad Design Flow Basics

Below are the basic work stages as you move from concept to finished PCB manufacturing file output when using the KiCad EDA tool suite:

  1. Schematic Capture – Draw circuit diagram connecting components with nets
  2. Schematic Symbols Creation – Make new parts with unique symbols and footprints
  3. Schematic Annotations – Assign reference designators to parts
  4. Netlist Generation – Output connectivity netlist file (.net)
  5. Footprint Assignment – Associate footprints to schematic parts
  6. Design Rule Check – Validate schematic for ERC/DRC errors
  7. PCB Layout – Convert netlist to board with parts placed and routed
  8. Gerber File Generation – Manufacturing output from PCB

We will focus specifically on steps 4 to 7 which enable progression from completed schematic diagram to functional PCB layout, ready for fabrication.

Generate Netlist File From Schematic

Once your schematic circuit drawing in the KiCad Eeschema schematic editor is logically complete with part symbols wired by nets representing connectivity just like the circuit should operate in physical reality, we are ready to move from schematic to board layout.

The NETLIST file acts as the bridge between the schematic sheet components connectivity and the layout board definition.

To generate a netlist:

  1. Select menu Tools > Generate Netlist Files
  2. Select the checkbox for format Pcbnew (*.net)
  3. Enter filename test_board for the netlist
  4. Select checkbox option Generate single net for unconnected pins
  5. Click OK button

This will generate test_board.net file with net connectivity data matching your schematic diagram’s circuit logic.

The key output netlist formats from Eeschema used at different points in the PCB design process are:

Netlist Format Description
.net PCBNew format used for PCB layout routing
.xml PCBNew format used to import custom schematic footprints
.bom Bill of Materials format for assembly

For now, we need the .net PCBNew netlist file that has extracted nets and component connectivity intelligence from the schematic.

Time to move to the PCB Layout editor.

Import Netlist into PCBNew Layout Tool

The PCB Layout editor tool within KiCad is named Pcbnew. This is the canvas where we will map our schematic circuit’s logical connectivity defined graphically in Eeschema down onto the physical domain of the PCB board that will be manufactured.

To import the generated netlist file:

  1. Launch Pcbnew from the KiCad toolbar
  2. Go to menu File > Import Netlist
  3. A dialog prompts you to select the *.net netlist file previously created.
  4. Select the checkbox option Keep Existing Libraries
  5. Click OK

This will open up the main PCB layout canvas and import all the parts and nets defined in our source schematic, ready for board layout work.

Run Electrical Rules Check

Before rushing into board layout placement and routing, it is good practice to run an electrical rules check on the imported netlist to spot any violations with component pin mappings or missing connections compared to the schematic.

Go to top toolbar Tools > Electrical Rules Check

KiCad will analyze the entire netlist and schematic connectivity, flagging warnings if finds any:

  • Unresolved component pin numbers conflicts when mapping schematic symbols to PCB footprints
  • Missing connections / continuity issues versus the schematic sheet
  • Duplicate reference designators assigned
  • Etc.

Address any errors or warnings reported at this stage before further progressing the design conversion. Once ERC passes cleanly, we can be confident to continue with component placement and layout work confident that the PCB connectivity matches the schematic completely.

Assign PCB Footprints to Components

Every schematic symbol needs a matching  PCB footprint assigned, which defines the physical land pattern on the board matching how component terminals will eventually solder down.

To assign footprints:

  1. With PCB board open, select menu Tools > Assign Footprints
  2. A spreadsheet loads with list of all schematic parts.
  3. Choose matching PCB footprint required from libraries already installed for each part.
  4. Saved selections automatically get mapped.

Repeat for all components ensuring every part has both:

  • Unique schematic symbol in schematic editor
  • Corresponding PCB footprint in Pcbnew layout tool

This cross-mapping connects the gates and pins of abstract schematic symbols to real solderable terminations on board.

PCB Layout Design Setup

Before placement and routing, some initial PCB layout design rule and workspace configurations need defining first:

  • Board outline dimensions
  • Copper layer counts
  • Grid & Component clearance rules
  • Net classes for trace widths/clearances
  • Routing zones definition
  • Layer stack table

Tools under Design Rules and Preferences menus allow correctly pre-setting these parameters matching circuit needs and capabilities of your PCB fabrication process.

For a simple single-sided PCB:

  • Define rectangular board dimensions under Page Settings
  • Add Keepout layer graphical boundary showing max size
  • Set 50mil grid spacing under Preferences
  • Define clearance rules between tracks, pads, vias
  • Map layers to physical PCB fabrication layers

Default settings tables can be used initially and refined later once placement is underway.

Begin Component Placement

We can now start intelligently placing components on the PCB canvas to gradually transform from rats nest to routed board layout matching schematic.

Steps for component placement:

  1. Select component to place from list of imported parts from schematic
  2. Move crosshair cursor to desired location on board
  3. Click or tap to anchor component at chosen position.
  4. Orient part footprint by R key rotation if needed
  5. Repeat placing all parts onto board canvas

Tips for good placement practices:

  • Follow logical grouping – Eg. place together related resistors, caps, ICs etc.
  • Start placing parts from a fixed reference like one board corner
  • Place parts from large to small size
  • Watch spacing – provide room for traces between parts
  • Think ahead for track routing paths
  • Place parts on front layer first then back layer

There are no fixed placement rules – experiment until parts layout passes visual sanity check ensuring adequate spacing while following natural circuit zones matching schematic flow.

Use grid snap and zoom controls to fine tune component locations as you work through placing the imported parts list.

Interactive Routing of Component Connections

Having all parts dropped means we now need to connect the dots – to make tracks linking parts pins together as electrically defined by our netlist connectivity imported from the schematic. This is the routing stage.

To interactively route:

  1. Select signal layer intended for trace
  2. Choose routing tool – track/via/wire
  3. Click trace start point – say a component pad
  4. Route trace and click destination pad
  5. Repeat tracing all points in same signal net

Routing Tips

  • Minimize via counts on signal layers
  • Use angled traces instead of meanders
  • Complete power traces first then signals
  • Route one trace end to end before starting next trace
  • Think neatness – avoid chaotic board appearance.

Use grid and snap controls to tidy up traces. Switch layers when changing routing direction avoiding collisions. Toggle rats nest view to verify unrouted connections pending.

The goal is to effectively link component pads together using copper track traces layer by layer until the rats nest fully disappears.

Your routed board should perfectly mirror the schematic connectivity down to the physical domain once routing is complete.

Final Checks – DRC, 3D View, Emulate

Before generating manufacturing gerber and drill files, run final checks:

  1. Design Rule Check – Validate no clearance violations under menu Tools > Design Rule Check
  2. 3D View – Under View > 3D Viewer visually check for missed connections in 3D mode
  3. Emulate – Tool Tools > Generate Footprint Positions File exports a .pos 3D assembly file from the board to mechanically trial component fit, clearances etc. in a New Project

Fix any last minute minor issues based on the feedback from these validation checks.

Output Gerber and Drill Files

Finally, we are ready to produce manufacturing outputs by plotting gerber masks and drill hits database.

Steps:

  1. Menu File > Fabrication Outputs.
  2. Select All layers you want outputs for- Top copper, bottom copper etc.
  3. Ensure options to generate Drill Map (.drl) file is selected.
  4. Click Make Plots button to save gerber files.

 

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