The many advantages of flyback converters include: lowest cost isolated power converters, easy provision of multiple output voltages, simple primary-side controller, and power output up to 300W. Flyback converters are used in many offline applications from televisions to phone chargers, as well as in telecommunications and industrial applications. Their basic operation can be intimidating, and the design options are numerous, especially for those who have never designed before. Let's look at some key design considerations for 53 VDC to 12V in 5A continuous conduction mode (CCM) flyback.
Figure 1 shows a detailed 60W flyback schematic operating at 250 kHz. When FET Q2 conducts, the input voltage is applied to the primary winding of the transformer. Now, the current in the winding gradually increases thereby storing energy in the transformer. Since the output rectifier D1 is reverse biased, current flow to the output is blocked. When Q2 turns off, the primary current is interrupted, forcing the voltage polarity of the winding to reverse. Now, current flows out of the secondary winding, making the point voltage positive reversing the polarity of the winding voltage. D1 conducts, delivering current to the output load and charging the output capacitor.
Figure 1 60 W CCM flyback converter schematic
Additional transformer windings can be added or even stacked on top of other windings for additional output. But the more output is added, the worse it becomes regulated. This is due to imperfect flux (coupling) between the windings and the core and physical isolation of the windings, creating leakage inductance. Leakage inductance is in series with the primary and output windings as stray inductance. This causes an unexpected voltage drop in series with the winding, effectively reducing the output voltage regulation accuracy. A general rule of thumb is to expect the unregulated output to vary by +/- 5% to 10% under cross-load conditions using a properly wound transformer. Additionally, the heavily loaded regulated output may cause the unloaded secondary output voltage to increase significantly through voltage spikes caused by peak detection leakage. In this case, preload or soft clamping can help limit the voltage.
CCM and discontinuous conduction mode (DCM) operation each have their own advantages. By definition, DCM operation occurs when the output rectifier current drops to 0A before the next cycle begins. Operating advantages of DCM include lower primary inductance (generally enabling smaller power transformers), elimination of rectifier reverse recovery losses and FET conduction losses, and the absence of right half-plane zeros. However, these advantages are offset by higher peak currents in the primary and secondary, increased input and output capacitance, increased electromagnetic interference (EMI), and reduced duty cycle at light loads compared to CCM.
Figure 2 Comparison of CCM and DCM flyback FET and rectifier current
Figure 2 illustrates how the current in Q2 and D1 changes at minimum VIN as the load decreases from maximum to about 25% in CCM and DCM. In CCM, the duty cycle is constant for a fixed input voltage and when the load is between its maximum and minimum design levels (about 25%). The current "base" level decreases with decreasing load until it reaches DCM, at which point the duty cycle decreases. In DCM, maximum duty cycle occurs only at minimum VIN and maximum load. The duty cycle is reduced to increase the input voltage or reduce the load.
This reduces the duty cycle at high and minimum loads, so make sure your controller can operate properly during this minimum on-time. DCM operation results in a dead time with a duty cycle below 50% after the rectifier current reaches 0-A. It is characterized by a sinusoidal voltage on the drain of the FET and is set by residual current, parasitic capacitance and leakage inductance, but is usually benign. For this design, CCM operation was chosen because higher efficiency can be achieved by reducing switching and transformer losses.
This design uses a primary bias winding with a reference voltage of 14V to power the controller after the 12V output reaches regulation, reducing losses compared to being powered directly from the input. I chose a two-stage output filter to achieve low ripple voltage. The first stage ceramic capacitor handles the high RMS current from the pulsating current in D1. Filters L1 and C9/C10 reduce their ripple voltage, providing approximately 10x ripple reduction as well as RMS current reduction in C9/C10. If higher output ripple voltage is acceptable, the L/C filter can be omitted, but the output capacitor must be able to handle the full RMS current.
The UCC3809-1 or UCC3809-2 controller is designed to interface directly with the U2 optocoupler for isolation applications. In non-isolated designs, U2 and U3 can be omitted along with the voltage feedback resistor divider connected directly to the controller, such as the UCC3813-x series with internal error amplifier.
The switching voltage across Q2 and D1 creates high-frequency common-mode currents in the transformer windings and component parasitic capacitances. Without EMI capacitor C12 to provide a return path, these currents will flow into the input and/or output, adding noise or possibly making operation unstable.
The Q3/R19/C18/R17 combination provides slope compensation by adding the oscillator's voltage ramp to R18's primary current sense voltage, which is used for current mode control. Slope compensation eliminates subharmonic oscillations, a phenomenon characterized by duty cycle pulses that are very broad and then very narrow. Since this converter is designed to operate at no more than 50% frequency, I added slope compensation to reduce susceptibility to switching jitter. However, an excessive voltage slope may push the control loop into voltage mode control and may cause instability. Finally, an optocoupler transmits the error signal from the secondary side to keep the output voltage stable. The feedback (FB) signal includes current ramp, slope compensation, output error signal and DC offset to reduce overcurrent threshold.
Figure 3 shows the voltage waveforms for Q2 and D1, showing some ringing caused by leakage inductance and diode reverse recovery.
Figure 3 FET and rectifier ringing is limited by the clamping and snubber circuit (57 VIN, 12 V at 5 A).
Flyback is considered standard in applications requiring low-cost isolated converters. This design example covers basic design considerations for CCM flyback design.