A schematic is a crucial step in the physical production of a circuit. It will prevent costly and time-consuming debugging and rework or revisions to PCBs. In PCB design, it is essential for the physical production boards, regardless of whether a schematic is used to assemble it by hand on a breadboard or create a printed circuit board.
This article outlines tools and practices we have used over time to reduce errors and create a complete and accurate schematic.
Accurate Schematics in PCB Design Begin with Accurate and Complete Symbols
Accurate symbols are the foundation of a reliable schematic. You must be familiar with the symbol editor of your schematic capture software. You will still need to be able to see and verify the properties of symbols even if you don’t have to create them yourself. Let’s see what we mean by saying an exact and complete symbol.
The symbol must have all pins on the part visible. There should be 44 pins on the symbol for each 44-pin part. We don’t use invisible pins like power or ground pins. We always show “No Connect” pins. Two types of “No Connects” will be discussed. Pins that should not be connected are the first “No Connect.” They can be disconnected from the part or used by the manufacturer for testing.
The U3 schematic has three pins (9-10-15) that are not to be connected but can always remain “open.” The schematic program allows a “Not Connected” type to be assigned as part of the symbol. These pins are marked permanently with an “x.” As shown in the schematic, we give them unique names like NC1, NC2, etc. Schematic programs allow duplicate names, such as “VCC”. We offer “No Connects” unique names by adding a number in the base name of NC.
Assigning the correct “electrical type” to each pin when building a symbol is crucial. These pin types are used in ERC, or Electrical Rules Checking. We’ll cover this later. A menu is used to add a type to a pin. The Electrical Type selection displays a list of typical electrical characteristics of a pin.
Modify pin types according to the signals assigned to pins. FPGAs, microcontrollers, and connectors require the symbol to be modified to set the proper electrical type to several pins. This is because the type of the part is design-dependent.
You may avoid repeating the same error by wasting time between creating the symbol and final checking.
Electric Rules Checking
ERC, or Electrical Rules Checking, is a utility that checks for improper connections in PCB design. It uses a set of rules. The rules generally look for connections between incompatible pins. The rules are typically specified using a “Connection Matrix.”
Here’s an example:
Engineers can assign each type of pin a row or column in the matrix. A rule is given to any combination of pins defined by the intersection of rows and columns. A green element in the matrix indicates that a connection is permitted between the two types. An “E” means that the report is in error. An “E displays an error in the notification. A default matrix is always used to represent a standard rule set. The matrix might need to be modified for your circuit.
ERC is subject to limitations. Each pin must have a unique pin type. Also, the rules matrix for each circuit must be meaningful. Make modifications to the rules matrix of your circuit, and then modify the schematic. You can still run ERC on the schematic, even with these limitations.
How to check a netlist
PCB designers always do a manual scan on the netlist. Although there may be disagreement about the necessity of this check, we have found errors that passed all other assessments. Finding one error is worth the effort, in my opinion. This is how the engineer can break down the technique into steps.
Step 1: Give a meaningful name for all nets.
Although the names may be brief and not meaningful to the designer, each net should have a unique name. It is common to use three or four letters. The schematic program can assign a name if the designer has not set a name. It all depends on the netlist format. Names are often assigned a number preceded by an “N . For example, “N0001234”. The designer in the schematic gives each net connected to U3 a name.
Step 2: Create a netlist format.
It is essential to choose a format that supports your schematic program and is easily readable by a human.
These formats are disappearing over time, which is a sad trend. You can use “Wirelist” as a base format. Wirelist was used in the past to wire circuits manually. This is an example of how we refer to a simple format.
“APD40”, the net name, shows a connection between U77 Pin 2 and U31 Pin. The pin names are A0, CP0, and so on.
Step 3: Rename all nets that were named by the schematic program.
Locate and rename nets with names that were not created by the designer but are instead assigned names by the schematic software.
You can open the netlist using a text editor to search for the appropriate string. Or, you can manually scan the net connections to find the names that have been assigned. Engineers should give these nets a meaningful name. Rebuild the netlist again and search again. Continue searching until all the automatically assigned names are gone.
Step 4: Perform a manual scan of the netlist to identify errors.
It takes patience and practice, but it is worth it if you find one mistake in a design. The designer can tell the number of connections for a specific net. The example shows that net “APD40”, which has two connections, is connected to the net. All nets named “APDnn,” however, have two connections. There is a problem if there aren’t two connections. This is especially important to verify that there are both power and ground connection. If you know that ten pins are powered from a net called VCC_5V, then look for ten connections on the netlist.
Assigning meaningful net names has other benefits. It makes it easier for PCB designers to communicate with others involved in the project. It is easier to find nets in an error report.
Cross Reference checks
The schematic program in PCB design will allow you to create a bill-of-materials (BOM) or Cross Reference Report. You can use the report to verify missing, mistyped, or malformed reference designations.
You can reduce confusion by noting the skipped reference designations in the schematic. Although it is not a good idea, having sequential reference designers with no missing numbers is a good practice. This helps keep things neat and stops others from wondering if there is a missing part.